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PE42552
Product Specification
Evaluation Kit
Figure 16. Evaluation Board Layouts
Peregrine Specification 101/0334
The SPDT switch EK Board was designed to ease
customer evaluation of Peregrine’s PE42552. The
RF common port is connected through a 50 ?
transmission line via the top SMA connector, J1.
RF1, RF2, RF3 and RF4 are connected through
50 ? transmission lines via SMA connectors J3,
J5, J2 and J4, respectively. A through 50 ?
transmission is available via SMA connectors J6
and J7. This transmission line can be used to
estimate the loss of the PCB over the
environmental conditions being evaluated.
The evaluation kit board is constructed of four
metal layers. The dual clad top RF layer is
Rogers RO4003 material with an 8 mil RF core
and er = 3.55. The other two dielectric layers are
FR4 for DC control and overall board strength with
an cumulative board thickness of 60 mils. The RF
transmission lines were designed using a
Grounded co-planar waveguide with a linewidth of
15 mils and gap of 10 mils.
Figure 17. Evaluation Board Schematic
Peregrine Specification 102/0404
J1
142-0761-881/891
2
9
GND
GND
4
J2
142-0761-881/891
10
GND
U1
GND
3
J3
142-0761-881/891
1
RF2
11
RF2
QFN50P3X3-16P
RF1
2
RF1
1
12
GND
GND
1
J4
HEADER 14
R1
DNI
2
4
6
8
10
12
14
2
4
6
8
10
12
14
1
3
5
7
9
11
13
1
3
5
7
9
11
13
CTRL
LS
VDD
VSS
R4
0 OHM
R2
DNI
L1
0 OHM
L1 WAS INDUCTOR
R3
DNI
C4
68pF
C3
22pF
C2
22pF
C1
22pF
J5
J6
142-0761-881/891
Through Line
142-0761-881/891
?2008 Peregrine Semiconductor Corp. All rights reserved.
1
1
Document No. 70-0246-03 │ UltraCMOS? RFIC Solutions
Page 6 of 9
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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